ASIC/FPGA Verification engineers
Nexer Telescope AB · Lund · Tills vidare · Deadline 2026-11-10
Nexer Telescope AB is recruiting **ASIC/FPGA Verification engineers** to work on digital hardware verification. The scope of the position covers the full verification lifecycle, including verification planning and specification, as well as the creation, adaptation, and maintenance of verification environments. Responsibilities also center on test case creation and execution. Candidates must have experience in **FPGA/ASIC top-level verification**, alongside hands-on experience in emulation and hardware design or systemization. Strong technical proficiency is required in **SystemVerilog and UVM**, C, VHDL, and working within Unix or Linux environments. Additional desirable assets include familiarity with formal verification, high-level synthesis, agile methodologies, and scripting skills in languages such as Python, TCL, or Perl. Experience with standard interfaces—such as Ethernet, I3C, SPI, SGMII, or CPRI—and AMBA design protocols like AXI, AHB, and APB is also considered an advantage.
Job Description
Scope:
Verification planning, specification, and Verification environment (creation / adaptation / maintenance)
Test case creation & execution
Requirements:
- Experience in FPGA/ASIC Top-Level Verification
- Excellent skills in SystemVerilog and UVM
- Experience in Emulation
- Strong skills in C and VHDL
- Experienced in Hardware design / systemization
- Good skills in working with UNIX and/or Linux
Good to have:
- Excellent skills in several standard interfaces, such as Ethernet, I3C, SPI, SGMII, CPRI etc
- Excellent skills in AMBA design, AXI, AHB, APB
- Formal verification
- High level synthesis
- Scripting skills using eg Python, TCL and / or Perl
- Agile